1. Field of Invention
The present invention relates to technologies of allocating addresses to data buffers, and specifically to a method for allocating addresses to data buffers applied in a distributed buffer chipset.
2. Description of Related Arts
The current computer system has increasingly high requirements on the memory (generally Synchronous Dynamic Random Access Memory (SDRAM)) capacity. However, as a larger memory capacity could result in a higher load and reduced signal integrity, the maximum memory capacity is reaching a limit. In order to increase system memory capacity, a Load Reduced Dual In-line Memory Module (LRDIMM) is designed, within which a buffer is inserted between a memory controller and a memory (for example, an SDRAM) to buffer all the information including commands, addresses and data. The memory controller drives several buffers, each of which drives several memories. In this way, a higher memory capacity could be obtained.
At present, the buffer of the LRDIMM may not be a single chip, and some may be distributed buffer chipsets formed by multiple chips. The distributed buffer chipset includes several data buffers for buffering data and a central buffer for buffering the commands and address, and also controlling the data buffers. In order to enable correctly identifying and controlling the corresponding data buffer by the central buffer, each data buffer needs a separate address. An existing method for allocating address parameters for the data buffer is that, each data buffer is additionally configured with several special address pins to allocate the address. N pins can allocate 2N addresses, and the number of the pins N is determined by the number M of the data buffers included within the distributed buffer chipset, that is, the value of N is the minimum integer value satisfying an inequality of 2N≧M, for example, when M=9, N=4.
Such configuration of the address pin undoubtedly increases the entire size of the chip and also affects the size of the entire distributed buffer chipset. However, in order to enhance the market competitive ability, a thinner and smaller computer is an ultimate goal at present, and in this way, the distributed buffer chipset configured in the computer inevitably develops towards such a goal, which causes limited pin resources of the data buffers encapsulated in the distributed buffer chipset. In such a case, it is necessary to develop a method for allocating addresses to data buffers in a distributed buffer chipset, so as to solve the additional configuration problem of the address pin, so that the design of the distributed buffer chipset conforms to the development trend of this industry.